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LTC2924 Quad Power Supply Sequencer

Fully Sequence and Monitor Four Supplies - Six with Minimal External Circuitry Cascadable for Additional Supplies Power Off in Reverse Order or Simultaneously Charge Pump Drives External MOSFETs Drives Power Supply Shutdown Pins with No External Pull-Up Resistors 10A Output Current Allows Soft-Starting of Supplies Done Indicator for Both Power On and Power Off Adjustable Time Delay Between Power Supplies Power Good Timer Power Supply Voltage Monitoring and Power Sequence Error Detection and Reporting Available in a 16-Lead Narrow SSOP Package
The LTC(R)2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 and up to five supplies can be sequenced to a sixth master supply. The LTC2924 requires a minimum of external components, using only two feedback resistors per sequenced power supply and a single resistor to set hysteresis. An internally regulated charge pump provides gate drive voltages for external logic and sub-logic-level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer for detecting the failure of any power supply to turn on within the selected time. Errors in power supply sequencing and the control input are detected and reported at the FAULT output. The LTC2924 features precision input comparators which can provide 1% accuracy in monitoring power supply voltages. Multiple LTC2924s may be easily cascaded to sequence a virtually unlimited number of power supplies.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIO S

Sequenced Power Supplies for ASICs with Multiple I/O and Core Voltages Latch-Up Prevention in Systems with Multiple Power Supplies
3.3V SHDN
1V
Q2
5V
5V SHDN
3V
Q1
VCC OUT1 IN1 IN2 IN3 IN4
5V EARLY
10k
SYSTEM CONTROLLER
10k
150nF
150nF
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TYPICAL APPLICATIO
VON = 2.64V VOFF = 1.98V VON = 0.93V VOFF = 0.915V VON = 3.97V VOFF = 2.97V VON = 2.79V VOFF = 2.73V 6.04k 100k 1.62k 66.5k
2V/DIV
5V/DIV 2V/DIV 5V/DIV 10ms/DIV
2924 TA01b
0.1F
OUT2 OUT3 OUT4 ON LTC2924 DONE FAULT TMR PGT
2V/DIV
1.69k
18.2k
3.09k
20k
5V/DIV
HYS/CFG GND
49.9k
Q1-Q4: IRL3714S ALL RESISTORS 1%
2V/DIV 5V/DIV
2924 TA01a
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Power-Up Sequence
5V 3.3V 3V 1V DONE TMR ON
FEATURES
DESCRIPTIO
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Power-Down Sequence
5V 3.3V 3V 1V DONE TMR ON 10ms/DIV
2924 TA01c
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LTC2924
(Note 1)
Supply Voltage (VCC) ................................ -0.3V to 6.5V Input Voltages ON, IN1-IN4 ............................... -0.3V to VCC + 0.3V PGT, TMR, HYS/CFG .................. -0.3V to VCC + 0.3V Open-Drain Output Voltages FAULT, DONE .............................. -0.3V to VCC + 0.3V Output Voltages (OUT1 - OUT4) (Note 5).............. -0.3V to VCC + 4.5V Operating Temperature Range LTC2924C ................................................ 0C to 70C LTC2924I ............................................ -40C to 85C Storage Temperature Range................. - 65C to 150C Lead Temperature (Soldering, 10 sec) .................. 300C
TOP VIEW IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4 1 2 3 4 5 6 7 8 16 ON 15 HYS/CFG 14 TMR 13 GND 12 PGT 11 VCC 10 DONE 9 FAULT
ORDER PART NUMBER LTC2924CGN LTC2924IGN GN PART MARKING 2924 2924I
GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125C, JA = 130C/W
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3V to 6V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS Supply VCC Input Supply Range ICC Input Supply Current ON Threshold VON(TH) ON, Low to High Threshold VOFF(TH) ON, High to Low Threshold IN1-IN4 Threshold VON(TH) IN1-IN4 Low to High Threshold VOFF(TH) IN1-IN4 High to Low Threshold ON, IN1-IN4 Characteristics VFAULT ON, IN1-IN4 High Speed Low Fault Threshold ION(HYS) ON, IN1-IN4 Hysteresis Current Range VON VON(TH) (Note 2) ION(ERROR) ON, IN1-IN4 Hysteresis Current Error 1 - (ION(HYS)/(0.5/RHYS)), VON(TH) = 1V 0.5A ION < 25A 25A ION 50A ILEAK ON, IN1-IN4 Leakage (Below Threshold) VON(TH) = 0.5V VON(HYS) ON, IN1-IN4 Minimum Hysteresis Voltage IHYS * RIN (Note 6) OUT1-OUT4 Characteristics VOUT(EN) OUT1-OUT4 Gate Drive Voltage IOUT(EN) OUT1-OUT4 On Current ROUT(OFF) OUT1-OUT4 Off Resistance to GND HYS Characteristics RHYS HYS Current Programming Resistor Range VHYS HYS Programming Voltage IOUTn = 0 OUTn On, VOUT = (VCC + 4V) OUTn Off, IOUT = 2mA (Notes 2, 3) RHYS Tied to GND RHYS Tied to VCC MIN

TYP
MAX 6 3 0.6121 0.6135 0.6142 0.6148 0.48 50 22 10 100
UNITS V mA V V V V V A % % nA mV V A V V
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3 1.5 0.6000 0.6014 0.6020 0.6026 0.33 0.5 0.6060 0.6074 0.6081 0.6087 0.4
2 4 VCC + 4.5 8.6

10
VCC + 6 11.2 240 1M
10k 0.5 VCC - 0.5
2
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W
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WW
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ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
LTC2924 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER TMR Characteristics ITMR Timer Pin Output Current VTH(HI) Timer High Voltage Threshold PGT Characteristics IPGT Power Good Timer Pin Output Current VPGT Power Good Timer Fault Detected Voltage Threshold DONE Characteristics DONE Pin Pull-Down Resistance to GND RD(LO) DONE Pin Off Leakage Current ID(HI) FAULT Characteristics RFAULT (LO) FAULT Pin Pull-Down Resistance to GND IFAULT(HI) VFAULT(HI) VFAULT(LO) RF(EXT) tFAULT tFAULT(MIN) FAULT Pin Off Leakage Current
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3V to 6V, unless otherwise noted.
CONDITIONS Timer On, VTMR 0.9V VCC = 5V Power Good Timer On, VPGT 0.9V VCC = 5V
MIN 4 0.93 4 0.93
TYP 5 1 5 1
MAX 6 1.07 6 1.07
UNITS A V A V
DONE = Low, I = 2mA DONE = High FAULT Being Pulled Low Internally, I = 2mA FAULT High

100 15 400 2 1.6 0.6 10 1 1
A A V V k s s
Voltage Above Which an Externally Generated FAULT Condition Will Not be Detected Voltage Below Which an Externally Generated FAULT Condition Will be Detected External Pull-Up Resistance Externally Commanded FAULT Below VFAULT(LO) to OUT1-OUT4 Pull-Down On Delay Externally Commanded FAULT Minimum Time (Note 4) Below VFAULT(LO)
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Hysteresis current must be 500nA minimum. Hysteresis current may exceed 50A, but accuracy is not guaranteed. Note 3: HYS/CFG pin must be pulled to GND or VCC with an external resistor. See Applications Information for details.
Note 4: Determined by design, not production tested. External circuits pulling down on the FAULT pin must maintain the signal below VFAULT(LO) for 1s. Note 5: Internal circuits may drive the OUTn pins higher than the Absolute Maximum Ratings. Note 6: RIN is the parallel combination of the two resistors forming the resistive divider connected to the ON and IN1-IN4 pins.
TYPICAL PERFOR A CE CHARACTERISTICS
2.3 2.1 1.9 VOUT (V) ICC (mA) 1.7 1.5 1.3 1.1 0.9 3 3.5 4 ON LOW ON HIGH
ICC vs VCC
IOUT1-4 = -10A RHYS = 51k
6 4 2
VOUT (V)
4.5 VCC (V)
5
UW
5.5
14 12 10 8
VOUT(EN) vs IOUT
VCC = 6V
12 11
VOUT(EN) vs VCC
IOUT1-4 < 1A
VCC = 3V
10 9
8 ONE OUTPUT DRIVING CURRENT 0 2 4 6 IOUT (A) 8 10 12
2924 G02
6
2924 G01
0
7
2
3
4 VCC (V)
5
6
2924 G03
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LTC2924 TYPICAL PERFOR A CE CHARACTERISTICS
55 50 RFAULT AT 2mA () 5 VCC (V)
2924 G04
RDONE vs VCC
RDONE AT 2mA ()
45 40
35
30
3
45 40 35 ISAT (mA) 30 25 20 15
OUTn (Off) ISAT vs Temperature
VOUT = 5V VCC = 6V ISAT (mA)
10 20 40 60 -60 -40 -20 0 TEMPERATURE (C)
4
UW
4
200 180 160 140 120 100 80
RFAULT vs VCC
6
3
4 VCC (V)
5
6
2924 G05
35
OUTn (Off) ISAT vs VCC
VOUT = 5V
30
25
20
VCC = 3V
15 10 2.5
80
100
3
3.5
4
4.5 VCC (V)
5
5.5
6
6.5
2924 G06
2924 G07
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LTC2924 PI FU CTIO S
IN1-IN4 (Pins 1, 2, 3, 4): Sequenced Power Supply Monitor Input. Connect this pin to an external resistive divider between each sequenced power supply and GND. During Power On sequencing, 0.61V (typ) at this pin indicates that the sequenced power supply (enabled with each of the OUT1-OUT4 pins) has reached the desired Power On sequence voltage. A hysteresis current (programmed by the HYS pin) is sourced out of each of the IN1-IN4 pins after the 0.61V threshold is detected. During the Power Off sequence, 0.61V at this pin indicates that the sequenced power supply has reached the desired Power Off voltage. The hysteresis current is removed after the 0.61V threshold is detected. OUT1-OUT4 (Pins 5, 6, 7, 8): Sequenced Power Supply Enable. Connect this pin to the shutdown pin or an external series N-channel MOSFET gate for each power supply being sequenced. (A low at this pin means the sequenced power supply is commanded to turn off.) When disabled, each output is connected to GND with a resistance of <240. When enabled, each output is connected to an internally generated charge pump supply (nominally VCC + 5V) via an internal 10A (typ) current source. FAULT (Pin 9): Fault Pin. Pull this pin high with an external 10k resistor. The LTC2924 will pull this pin low if a fault condition is detected (see Applications Information for details). Pulling this pin low externally causes a simultaneous unsequenced Power Off. DONE (Pin 10): Done Pin. Pull this pin high with an ex ternal 10k resistor. This open-drain output pulls low at the completion of the Power-On sequence. At the end of the Power Off sequence, the LTC2924 floats this pin. For cascading multiple LTC2924s, see Application Information for connecting the DONE pin. VCC (Pin 11): LTC2924 Power Supply Input. All internal circuits are powered from this pin. VCC should be connected to a low noise power supply voltage and should be bypassed with at least a 0.1F capacitor to the GND pin in close proximity to the LTC2924.
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PGT (Pin 12): Power Good Timer. The PGT pin sets the time allowed for a power supply to turn on after being enabled with the OUT1-OUT4 pins. Connecting a capacitor between this pin and ground programs a 200mS/F duration. The PGT pin is reset before each of the OUT1-OUT4 pins are asserted. If the voltage at the PGT pin reaches 1V, a fault condition is asserted. The PGT pin must be connected directly to ground to disable the power good timer function. GND (Pin 13): Ground. All internal circuits are returned to the GND pin. Connect this pin to the ground of the power supplies that are being sequenced. TMR (Pin 14): Timer. A capacitor connected between this pin and ground sets the time delay between a supply ready (IN1-IN4) signal and the enabling of the next power supply in the sequence (OUT1-OUT4), with a 200mS/F duration. The TMR pin may be left floating if no delay is required between supplies being sequenced on or off. If an internal fault condition occurs, TMR will indicate so by going to VCC until the fault condition is cleared. Do not connect any other circuits to the TMR pin. HYS/CFG (Pin 15): Hysteresis Current Setting and Cascade Configuration. Connecting a resistor between this pin and GND programs a 0.5/REXT (typ) hysteresis current which is sourced out of each IN and ON pin. When multiple LTC2924s are cascaded, the HYS/CFG pin is also used to configure the position of the first LTC2924. See Applications Information for details. ON (Pin 16): On Pin. Commands the LTC2924 to sequence the power supplies up (Power On sequence) or down (Power Off sequence). Typically connected to a system controller. Hysteresis current is applied to this pin when above 0.61V (typ). This pin has a precision 0.61V threshold and can be used to sense a nonsequenced power supply's voltage to start the Power On sequence. See Applications Information for details. For cascading multiple LTC2924s, see Applications Information for connecting the ON pin.
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LTC2924 W
11
FU CTIO AL DIAGRA U
1
2
6
U
IH
VCC VCP
16
ON
+
0.61V
10A
-
IH
OUT1
5
VCP
IN1
+
0.61V
0.61V 1V 0.5V INTERNAL REFERENCE
10A
-
IH
OUT2
UVLO
6
IN2
CLOCK
VCP 10A
+
0.61V
-
IH
CHARGE PUMP 5
VCP
OUT3
4
7
VCP
3
IN3
+
0.61V
LOGIC
10A
-
OUT4
IH
8
4
IN4
+
0.61V
LAST
DONE
10
-
IH
FAULT
15
HYS/CFG
FIRST DETECT
0.5V
9
5A
5A
+
TMR 1V
+
1V
PGT
12
14
-
-
GND
13
2924 BD
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LTC2924 U
PS1 VPS1(ON) PS3 VPS3(ON) PS2 VPS2(ON) VPS4(ON) VPS1(OFF) PS4 VPS4(OFF) VPS3(OFF) VPS2(OFF)
2924 F01
OPERATIO
0V TMR* ON
DONE
*TMR IS CAPACITOR ADJUSTABLE
Figure 1. Power On and Power Off Sequence for Four Supplies
The LTC2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 (see Figure 1). An internally regulated charge pump provides (VCC + 5V) gate voltages for driving external logic-level and sub-logic level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer which detects the failure of any power supply to turn on within the set time. The ON pin signal is used to command the LTC2924 to start the Power On and Power Down sequences. To command the Power On sequence, the ON pin is pulled above 0.61V by a system controller or a resistive divider from a power supply. A voltage comparator senses the ON command and signals the sequencing logic to start the Power On sequence. When the Power On sequence starts, the TMR grounding switch is released and a 5A current source charges an external capacitor, CTMR (see Figure 2). When the voltage on this capacitor exceeds 1V, a comparator signals the
ON
0.61V 1V
TMR
OUT1 0.61V
IN1
OUT2 0.61V
IN2
OUT3 0.61V
IN3
OUT4 0.61V
IN4
DONE
2924 F02
Figure 2. On Sequence for Four Supplies
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LTC2924
logic, which starts the charge pump and enables OUT1 to turn on the first power supply. The power good timer circuit is also enabled by turning off the switch that is shorting the external capacitor to ground and enabling a 5A current source to charge the CPGT capacitor. The output circuit responds by opening a switch, which is shorting the OUT1 pin to ground and enabling a 10A current source, which is connected to the charge pump. The OUT1 pin can be connected to either the shutdown pin of a power supply or the gate of a N-channel MOSFET that is in series with the output of the sequenced power supply. As the power supply turns on, the resistive divider connected to the IN1 pin starts to drive up the voltage at the IN1 pin. When the voltage at this pin exceeds 0.61V, the comparator signals the logic that the first power supply is on. At this time a current is sourced out of the IN1 pin which serves as the hysteresis current for the input comparator. This allows the application to choose a lower Power Off voltage sense during the Power Off sequence. The power good timer (PGT) circuit is signaled and resets the PGT capacitor. The timer circuit is enabled and the cycle repeats until the last power supply has turned on. When the last power supply has turned on, the DONE pin pull-down switch is turned on to signal that the Power On sequence has completed. If a power supply fails to turn on after it is enabled and the voltage at the PGT pin exceeds 1V, the LTC2924 will disable all power supplies by pulling all OUT pins to ground. A fault condition will be indicated by the FAULT pin pulling low. The hysteresis current sourced at the ON pin and each IN pin is set at the HYS/CFG pin. The current is determined
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by an external resistor nominally pulled to ground. The hysteresis current is 0.5V/RHYS. The Power Off sequence is initiated by pulling the ON pin below 0.61V after a Power On sequence has completed (see Figure 3). The Power Off sequence turns off the power supplies in the reverse order of the Power On sequence. OUT4 is turned off first. The timer function is used between each supply being sequenced down. The PGT is not used. The end of the Power Off sequence is indicated by the LTC2924 floating the DONE pin.
0.61V ON TMR OUT4 0.61V IN4 OUT3 0.61V IN3 OUT2 0.61V IN2 OUT1 0.61V IN1 DONE
2924 F03
OPERATIO
Figure 3. 4-Power Supply Power Off Sequence
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LTC2924
Up to five supplies can be sequenced to a sixth master supply by a single LTC2924 (Figure 4). The turn on of the first power supply is sensed by the ON pin. Power supplies two through five are enabled by the OUT1 through OUT4 pins, and their turn on sensed by the IN1 through IN4 pins respectively. The last power supply is enabled by the DONE pin, which is generally connected through an inverter. This application is used where power supplies are sequentially sequenced on and the turn off is simultaneous. Multiple LTC2924s can be cascaded to facilitate sequencing of eight or more power supplies. See the Cascading Multiple LTC2924s section.
VCC EARLY*
SYSTEM CONTROLLER
TURN OFF
*VCC EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES
Figure 4. 6-Power Supply Sequencer Block Diagram
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Selecting the Hysteresis Current and IN Pin Feedback Resistors The IN1-IN4 pins are connected to a sequenced power supply with a resistive divider. The resistors are calculated by first selecting a hysteresis current, IHYS, and calculating RHYS: RHYS = 0.5V ; 0.5A IHYS 50A IHYS For each sequenced power supply, choose a voltage when the power supply is considered to be On during
PS1 SHDN VOUT
APPLICATIO S I FOR ATIO W UU
PS2 SHDN VOUT
PS3 SHDN VOUT
PS4 SHDN VOUT
PS5 SHDN VOUT
PS6 SHDN VOUT
VCC OUT1 OUT2 OUT3 OUT4 DONE FAULT GND LTC2924 ON IN1 IN2 IN3 IN4
2924 F04
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LTC2924
a Power On sequence (VON) and Off during a Power Off sequence (VOFF). Referring to Figures 5 and 6, each set of resistors can then be calculated by: VON - VOFF IHYS R * 0.61V RA = B VON - 0.61V RB = In the following example (Figure 5) IHYS is 50A. This corresponds to a RHYS resistor of:
IHYS
VPS IHYS IN RB RA 0.61V
2924 F05
VON = 2.2V VOFF = 1V IRB IFB = IRB + IHYS
+ -
Figure 5. Designing IHYS, Feedback Resistors
POWER SUPPLY 1 3.3V SHDN SHDN 5V 1.6V SHDN 2.5V SHDN
POWER SUPPLY 2 POWER SUPPLY 3 POWER SUPPLY 4 5V EARLY*
10k
10k
SYSTEM CONTROLLER *5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF 150nF
Figure 6. Typical Power Supply Sequencer
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RHYS = 0.5V = 10k 50A In Figure 5, VON = 2.2V and VOFF = 1V. Using the equations provided above: 2.2V - 1V = 24k 50A 24k * 0.61V = 9.2k RA = 2.2V - 0.61V RB = Hysteresis Voltage Check After calculating the resistors RB and RA, check to make sure the hystersis voltage at the ON and IN1-IN4 pins is greater than 4mV. Use the following equation: VHYS = RA + RB For this example: VHYS =
APPLICATIO S I FOR ATIO W UU
( VON - VOFF ) * RA (2.2V - 1V) * 9.2k = 0.33V
9.2k + 24k
VON 3.01V VOFF 2.68V VON 4.49V VOFF 3.99V VON 1.43V VOFF 1.27V VON 2.25V VOFF 2V
which is greater than 4mV.
0.1F 24.9k VCC 15.8k 49.9k 33.2k
OUT1 OUT2 OUT3 OUT4 ON DONE FAULT TMR PGT
LTC2924
IN1 IN2 IN3 IN4 9.31k 11.81k 7.87k 8.45k
HYS/CFG GND 49.9k
2924 TA03
LTC2924
Minimize stray capacitance on the ON and IN1-IN4 pins. As a practical matter, lay out these resistors as close to the LTC2924 as possible. Details of Resistor Calculations In this example, the voltage at the IN pins is 0.61V when the LTC2924 detects that the power supply is On during a Power On sequence or Off during a Power Off sequence. The delta voltage, V, represents the difference: V = 2.2V - 1V = 1.2V This delta voltage on RB will be equal to the product of hysteresis current IHYS and RB. Therefore: RB = 1.2V V = = 24k IHYS 50A
The current IRB at the Power On voltage of 2.2V is: 2.2V - 0.61V IRB = = 66A 24k During the Power On sequence, IHYS = 0, so IFB is equal to IRB and RA is: RA = 0.61 = 9.2k 66A
VOFF Precaution Use caution if designs call for VOFF voltages less than ~0.8V. Many loads stop using significant current at this level, and the power supply may take a long time to go below this voltage. If VOFF voltages at or less than this voltage are necessary, consider adding an extra resistive load at the output of the power supply to ensure it discharges in a reasonable amount of time.
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Selecting the Timing Capacitor During the Power On sequence, the timer is used to create a delay between the time one supply reaches the On threshold and the next supply is enabled. During the Power Off sequence, the timer is used to create a delay between the time one supply reaches the Off threshold and the next supply is disabled. Select the timing capacitor with the following equation: CTMR [F] = tDELAY * 5F/s Leaving the TMR pin unconnected will generate the minimum delay. The accuracy of the time delay will be affected by the capacitor leakage (the nominal charge current is 5A) and capacitor tolerance. A low leakage ceramic capacitor is recommended. Selecting the Power Good Timer (PGT) Capacitor During the Power On sequence, the PGT can be used to detect the failure of a power supply to reach the desired On voltage. The PGT is enabled each time a power supply is enabled by the OUT1-OUT4 pins. The PGT is reset each time an IN1-IN4 pin detects that a power supply is at the desired On voltage. Select the PGT timeout capacitor with the following equation: CPGT [F] = tPGT * 5F/s If no PGT is desired, the PGT pin must be shorted to ground. The accuracy of the PGT timeout will be affected by the capacitor leakage (the nominal charge current is 5A) and capacitor tolerance. A low leakage ceramic capacitor is recommended.
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APPLICATIO S I FOR ATIO W UU
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LTC2924 U
VCC
VCC GND OUT1 OUT2 OUT3 OUT4 DONE FAULT RHYS
APPLICATIO S I FOR ATIO W
VCC GND OUT1 OUT2 OUT3 OUT4 DONE FAULT
RHYS
ON
Cascading Multiple LTC2924s Two or more LTC2924s may be cascaded to fully sequence 8,12 or more power supplies. Figures 7 and 8 show how to configure the LTC2924 to sequence 8 and 12 power supplies. To sequence more power supplies, use the circuit in Figure 8 and add more LTC2924s in the middle. Notice that the last LTC2924 in the cascade string must have a pull-up resistor on the DONE pin. Any LTC2924 that is not the first in the cascade string should have the hysteresis current setting resistor, RHYS, pulled to VCC instead of ground. The value of the RHYS resistor remains unchanged. The FAULT pins should all be connected together and pulled up with a single 10k resistor. Care should be taken when designing a circuit cascading multiple LTC2924s. Use the following guidelines:
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TMR HYS/CFG RHYS ON IN1 IN2 IN3 IN4
TMR HYS/CFG IN1 IN2 IN3 IN4 FAULT
VCC GND OUT1 OUT2 OUT3 OUT4 DONE
VCC
ON LTC2924 PGT
ON LTC2924 PGT
10k VCC DONE
10k FAULT
2924 F07
Figure 7. Cascading Two LTC2924s to Fully Sequence Up to Eight Power Supplies
VCC
TMR HYS/CFG IN1 IN2 IN3 IN4
RHYS
TMR HYS/CFG IN1 IN2 IN3 IN4 FAULT
VCC GND OUT1 OUT2 OUT3 OUT4 DONE
RHYS
TMR HYS/CFG IN1 IN2 IN3 IN4 FAULT
VCC GND OUT1 OUT2 OUT3 OUT4 DONE
VCC
ON LTC2924 PGT
ON LTC2924 PGT
ON LTC2924 PGT
10k VCC DONE
10k FAULT
2924 F08
Figure 8. Cascading Three LTC2924s to Fully Sequence Up to 12 Power Supplies
* All VCC and ground pins for the LTC2924s in the cascade chain must be connected to the same power supply. * The ground pins should be connected via a ground plane. * Cascaded LTC2924s communicate using a combination of levels and pulses which do not look like the normal output of a DONE pin nor input to an ON pin. Do not connect any other components to the node between the DONE and ON pins. Keep the parasitic capacitance on this node below 75pF. Care should be taken when routing a circuit trace between DONE and ON. If possible, run the trace adjacent to the ground plane, and/or shield the trace with a ground trace on either side. Leakage currents must be maintained below 2A on this node.
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LTC2924 U
LTC2924 IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4
2924 F09
APPLICATIO S I FOR ATIO
PS1
PS2
Connecting Unused OUT and IN Pins Figure 9 shows how to connect unused OUT and IN pins on the LTC2924. Unused OUT-IN pairs must be connected together to ensure proper operation. Fault Detection The LTC2924 has sophisticated fault detection which can detect: * Power On and Power Off sequence errors * System controller command errors * Power On timeout failure (with the power good timer enabled) * Externally commanded faults (FAULT pin pulled low) If any of the above faults are detected, the LTC2924 immediately pulls the OUT1-OUT4 pins low turning off all of the power supplies. If the fault condition is detected in one of the supplies controlled by the LTC2924 (an "internally generated" fault), the FAULT pin is immediately pulled low indicating the fault condition.
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Figure 9. Connecting Unused OUT and IN Pins
Clearing the Fault Condition In order to clear the fault condition within the LTC2924, the following conditions must exist: * All four IN pins must be below 0.61V * The ON pin must be below 0.61V * In the case of an externally generated fault, the FAULT pin must not be pulled down. Fault Condition Indicator If the LTC2924 receives a commanded fault (a cascaded LTC2924 or an external source pulls down on the FAULT pin) the LTC2924 will pull the TMR pin low. If the LTC2924 has detected the fault itself (from its internal fault detection circuits) it will indicate so by raising the TMR pin to VCC. This internal/external fault indicator can be especially helpful while searching for the source of a fault condition when multiple LTC2924s are cascaded. If a fault occurs when the ON pin is high, the fault status indication on the TMR pin will remain valid until the ON pin goes low.
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LTC2924
Note that the TMR pin may take a while to reach the VCC voltage. The pin is pulled to VCC with the same 5A current source used for the TMR function. The larger the timer capacitor, the longer this will take. To estimate the amount of time required for the TMR pin to reach VCC in a fault condition, multiply the normal timer duration by VCC (in Volts). See Figures 7 and 8 for FAULT pin connections when two or more LTC2924 chips are cascaded. Sequence Errors The LTC2924 keeps track of power supplies that should be on during the Power On sequence and the Power Off sequence. The LTC2924 also monitors each IN pin after all of the power supplies have sequenced on. If a power supply (as monitored at the IN1-IN4 pins) goes low when it should be high, a fault condition is detected. All four OUT pins are pulled low and the FAULT pin will be pulled low. The precision voltage threshold for detection of a sequence error at any of the IN1-IN4 pins is the same as the normal threshold (~0.61V). The precision voltage comparators used in the LTC2924 employ a sampled technique to improve accuracy. The sample time is approximately 20s. To improve the speed of detection for a sequence error, a second high speed comparator is used for detecting a low power supply. The voltage threshold for the high speed comparators is approximately 0.4V (VON(FAULT)). Voltages sensed below this threshold when a power supply should be ON will cause a fault in ~1s.
14
U
System Controller ON Command Errors Once the LTC2924 receives the Power On command via the ON pin, the ON pin must remain above 0.61V until the Power On sequence has completed (e.g. DONE is asserted). Removing the ON command before the LTC2924 Power On sequence has completed is considered a fault condition. All of the OUT1-OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low. The same is true for the Power Off sequence. If the LTC2924 has completed the Power On sequence and the ON pin goes low, the ON pin must remain below 0.61V until the Power Off sequence has completed. Raising the ON pin above 0.61V before the Power Off sequence has completed is considered a fault condition. Any OUTn pins that are still high will immediately be pulled low and the FAULT pin will be pulled low. Power On Timeout Errors If the LTC2924 PGT is being used (not tied to ground) a fault condition will be detected when the PGT pin goes above ~1V. If this occurs during Power On, all of the OUT1-OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low. Externally Commanded Faults If an external circuit pulls the FAULT pin low, an external fault condition is detected and all OUT pins will be pulled low. After sensing the Externally Commanded Fault, the LTC2924 will also pull down on the FAULT pin until the conditions for clearing the fault condition exist (see Clearing the Fault Condition).
2924fa
APPLICATIO S I FOR ATIO W UU
LTC2924 TYPICAL APPLICATIO S U
Series MOSFET Power Supply Sequencer
1V Q1 0.1F Q2 0.1F Q3 0.1F Q4 0.1F VCC OUT1 OUT2 OUT3 10k SYSTEM CONTROLLER 10k OUT4 ON LTC2924 DONE FAULT TMR 150nF 150nF PGT HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1% IN1 IN2 IN3 IN4 11.8k 7.68k 1.69k 3.09k 52.3k 45.3k 6.04k 0.1F VON = 0.93V VOFF = 0.91V VON = 2.79V VOFF = 2.73V VON = 4.21V VOFF = 3.76V VON = 3.32V VOFF = 2.80V 1.62k
3.3V
5V 5V EARLY
2924 TA02a
Power-Up Sequence
Power-Down Sequence
5V 2V/DIV 3.3V 1V 10V/DIV 2V/DIV 2V/DIV 25ms/DIV
2924 TA02b
5V 2V/DIV 3.3V 1V 10V/DIV 2V/DIV 2V/DIV 25ms/DIV
2924 TA02c
DONE ON TMR
DONE ON TMR
2924fa
15
LTC2924 TYPICAL APPLICATIO S U
Shutdown Pin Power Supply Sequencer
VON 3.01V VOFF 2.68V 5V 1.6V SHDN 2.5V SHDN VON 4.49V VOFF 3.99V VON 1.43V VOFF 1.27V VON 2.25V VOFF 2V 0.1F 24.9k VCC OUT1 10k 10k OUT2 OUT3 OUT4 ON SYSTEM CONTROLLER *5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF 150nF DONE FAULT TMR PGT HYS/CFG GND 49.9k
2924 TA03
POWER SUPPLY 1
3.3V SHDN SHDN
POWER SUPPLY 2 POWER SUPPLY 3 POWER SUPPLY 4 5V EARLY*
15.8k
49.9k
33.2k
LTC2924
IN1 IN2 IN3 IN4 9.31k 11.81k 7.87k 8.45k
Power On Sequence Timer Delay Longer than Power Off Sequence Timer Delay
VCC VCC 0.1F OUT1 OUT2 LTC2924 OUT3 OUT4 PGT FAULT GND DONE
2924 TA04
IN1 IN2 IN3 IN4 ON TMR 150nF 150nF
VCC 10k
2N7002 POWER ON TIMER DELAY = 30ms POWER OFF TIMER DELAY = 15ms
2924fa
16
LTC2924 TYPICAL APPLICATIO S
2-Supply Sequencer with Delayed Sense Pin, One Channel Unused
Q1 Q2 D1 DC/DC 3.3V SHDN 1M VOUT VON 2.98V 3.3V VOFF 2.65V PARASITIC RESISTANCE OUT+ MODULE SENSE+ 5V
10k
SYSTEM CONTROLLER
D1: 1N5711 Q1, Q2: IRL3714S
Power-On
REMOTE SENSE ENABLE 5V 2V/DIV 3.3V DONE 1V/DIV 1V/DIV 25ms/DIV
2924 TA05b
U
VOUT VON 4.64V 5V VOFF 4V
0.1F 10k
OUT4 OUT3 OUT2
VCC IN4 IN3
64.9k
33.2k
IN2 OUT1 LTC2924 ON IN1 FAULT DONE TMR 150nF PGT HYS GND 49.9k 150nF 9.83k 8.55k
2924 TA05a
Power-Off
REMOTE SENSE DISABLE 5V 2V/DIV 3.3V
ON TMR
1V/DIV 1V/DIV 25ms/DIV
2924 TA05c
ON TMR
2924fa
17
LTC2924 TYPICAL APPLICATIO S
-5V 0.1F
100k
3V
0.1F Q3 0.1F Q4 0.1F VCC OUT1 OUT2 OUT3 10k 10k OUT4 ON LTC2924 DONE FAULT TMR 150nF 150nF PGT HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1% IN1 IN2 IN3 IN4 11.8k 7.68k 1.69k 52.3k 45.3k 6.04k 0.1F
5V 5V EARLY
SYSTEM CONTROLLER
Power-Up Sequence
5V 3.3V -5V 5V/DIV 2V/DIV 2V/DIV 10ms/DIV
2924 TA07b
5V/DIV
18
U
Precision Negative Rail Sequencer
Q1 10k VON - 4.5V VOFF - 3.9V 1.36k
1M
-
LM321
7k
+
2N3906 SOT-23 Q2 VON = 2.79V VOFF = 2.73V VON = 4.21V VOFF = 3.76V VON = 3.32V VOFF = 2.80V
2924 TA06a
Power-Down Sequence
5V 3.3V -5V 5V/DIV 2V/DIV 2V/DIV 10ms/DIV
2924 TA07c
5V/DIV
DONE
DONE TMR ON
TMR ON
2924fa
LTC2924 U
GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 .005
PACKAGE DESCRIPTIO
.189 - .196* (4.801 - 4.978) 16 15 14 13 12 11 10 9
.009 (0.229) REF
.254 MIN
.150 - .165
.229 - .244 (5.817 - 6.198)
.0165 .0015 .0250 BSC
.150 - .157** (3.810 - 3.988)
RECOMMENDED SOLDER PAD LAYOUT
1 .015 .004 x 45 (0.38 0.10)
.007 - .0098 (0.178 - 0.249) 0 - 8 TYP .0532 - .0688 (1.35 - 1.75)
23
4
56
7
8
.004 - .0098 (0.102 - 0.249)
.016 - .050 (0.406 - 1.270)
.008 - .012 (0.203 - 0.305) TYP
.0250 (0.635) BSC
GN16 (SSOP) 0204
NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2924fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC2924
12V 3-Supply Sequencer with LTC2924 Power Supplied by a Zener Shunt Regulator
12V SYSTEM 12V SUPPLY ON 1.1V, OFF 1.09V 1k 1.24k VIN 3.3V SHDN ON 3V, OFF 2.8V 20k 5.11k VIN 2.5V SHDN 49.9k ON 1.5k 2.94k LTC2924 5.1V ZENER BZX84C5V1 VCC 0.1F HYS/CFG 49.9k TMR 150nF GND OUT4 IN4 OUT3 IN3 OUT2 IN2 OUT1 IN1 DONE FAULT PGT 150nF VCC VCC 10k 10k
2924 TA08
RELATED PARTS
PART NUMBER LTC2920-1/ LTC2920-2 LTC2921/LTC2922 LTC2923 LTC2925 LTC2926 LTC2927 DESCRIPTION Single/Dual Power Supply Margining Controller Power Supply Tracker with Input Monitors Power Supply Tracking Controller Multiple Power Supply Tracking Controller Master Controlled Power Supply Tracker Single Power Supply Tracker COMMENTS Symmetric/Asymmetric High and Low Voltage Margining 3 (LTC2921) or 5 (LTC2922) Remote Sense Switching Up to 3 Supplies Power Good Timer, Remote Sense Switch Closed Loop (Feedback) Tracking for 3 Supplies For Point of Load or Distributed Applications
20 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
VIN 1.2V SHDN C VCC1 VCC2 RESET_B FPGA VCC1 VCC2 ON 2.2V, OFF 2V 20k 7.68k ASIC VCC1 VCC2
2924fa LT/LT 1005 REV A * PRINTED IN USA
TYPICAL APPLICATIO
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2005

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